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authorHuber, Andreas <Andreas.Huber@keymile.com>2011-05-02 22:56:54 +0000
committerWolfgang Denk <wd@denx.de>2011-05-10 22:48:45 +0200
commitf30c62bbe8988a8341970cbb7e14bb7a99abb157 (patch)
tree13134f96cb17a2d67a19d21df5cbc271dd620dd7 /board/keymile/common
parent0278236c38a7fcde95dadc493b26ad612e88ac05 (diff)
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powerpc/km82xx: rework DIP switch detection
Introduce a struct for the BFTICU FPGA to increase the readability of the code. And the define CONFIG_SYS_BFTICU_BASE was removed because the CONFIG_SYS_FPGA_BASE is already the base value for BFTICU registers. Signed-off-by: Andreas Huber <andreas.huber@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'board/keymile/common')
-rw-r--r--board/keymile/common/common.h79
1 files changed, 79 insertions, 0 deletions
diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index 14768c9..6ce992a 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -39,6 +39,85 @@ struct km_bec_fpga {
unsigned char pgy_eth;
};
+#define BFTICU_DIPSWITCH_MASK 0x0f
+
+/*
+ * BFTICU FPGA iomap
+ * BFTICU is used on mgcoge and mgocge3ne
+ */
+struct bfticu_iomap {
+ u8 xi_ena; /* General defect enable */
+ u8 pack1[3];
+ u8 en_csn;
+ u8 pack2;
+ u8 safe_mem;
+ u8 pack3;
+ u8 id;
+ u8 pack4;
+ u8 rev;
+ u8 build;
+ u8 p_frc;
+ u8 p_msk;
+ u8 pack5[2];
+ u8 xg_int;
+ u8 pack6[15];
+ u8 s_conf;
+ u8 pack7;
+ u8 dmx_conf12;
+ u8 pack8;
+ u8 s_clkslv;
+ u8 pack9[11];
+ u8 d_conf;
+ u8 d_mask_ca;
+ u8 d_pll_del;
+ u8 pack10[16];
+ u8 t_conf_ca;
+ u8 t_mask_ca;
+ u8 pack11[13];
+ u8 m_def0;
+ u8 m_def1;
+ u8 m_def2;
+ u8 m_def3;
+ u8 m_def4;
+ u8 m_def5;
+ u8 m_def_trap0;
+ u8 m_def_trap1;
+ u8 m_def_trap2;
+ u8 m_def_trap3;
+ u8 m_def_trap4;
+ u8 m_def_trap5;
+ u8 m_mask_def0;
+ u8 m_mask_def1;
+ u8 m_mask_def2;
+ u8 m_mask_def3;
+ u8 m_mask_def4;
+ u8 m_mask_def5;
+ u8 m_def_mask0;
+ u8 m_def_mask1;
+ u8 m_def_mask2;
+ u8 m_def_mask3;
+ u8 m_def_mask4;
+ u8 m_def_mask5;
+ u8 m_def_pri;
+ u8 pack12[11];
+ u8 hw_status;
+ u8 pack13;
+ u8 hw_control1;
+ u8 hw_control2;
+ u8 hw_control3;
+ u8 pack14[7];
+ u8 led_on; /* Leds */
+ u8 pack15;
+ u8 sfp_control; /* SFP modules */
+ u8 pack16;
+ u8 alarm_control; /* Alarm output */
+ u8 pack17;
+ u8 icps; /* ICN clock pulse shaping */
+ u8 mswitch; /* Read mode switch */
+ u8 pack18[6];
+ u8 pb_dbug;
+};
+
#if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET)
#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0
#endif