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author | Anson Huang <Anson.Huang@freescale.com> | 2015-12-11 01:40:22 +0800 |
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committer | Anson Huang <Anson.Huang@freescale.com> | 2015-12-16 22:15:21 +0800 |
commit | f0116e5f8592f0c6249e6bafd6665ff7d318ea0f (patch) | |
tree | 613e7d2a028f35cdc1eb786e79908535bae39b18 /board/inka4x0/mt48lc16m16a2-75.h | |
parent | f355f117a6d735b0c3cba79f1cb24829cf8cae25 (diff) | |
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MLK-11995 ARM: imx7: add i.mx7d TO1.1 support for LPSR mode
i.MX7D TO1.1 changes DDR retension mode control to IOMUXC_GPR,
add support to this change for LPSR which needs to exit from
DDR retension mode.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
Diffstat (limited to 'board/inka4x0/mt48lc16m16a2-75.h')
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