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authorwdenk <wdenk>2003-06-27 21:31:46 +0000
committerwdenk <wdenk>2003-06-27 21:31:46 +0000
commit8bde7f776c77b343aca29b8c7b58464d915ac245 (patch)
tree20f1fd99975215e7c658454a15cdb4ed4694e2d4 /board/genietv
parent993cad9364c6b87ae429d1ed1130d8153f6f027e (diff)
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* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'board/genietv')
-rw-r--r--board/genietv/Makefile2
-rw-r--r--board/genietv/genietv.c30
-rw-r--r--board/genietv/u-boot.lds6
-rw-r--r--board/genietv/u-boot.lds.debug6
4 files changed, 26 insertions, 18 deletions
diff --git a/board/genietv/Makefile b/board/genietv/Makefile
index ef173d0..13ce9fc 100644
--- a/board/genietv/Makefile
+++ b/board/genietv/Makefile
@@ -28,7 +28,7 @@ LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
$(LIB): .depend $(OBJS)
- $(AR) crv $@ $^
+ $(AR) crv $@ $(OBJS)
#########################################################################
diff --git a/board/genietv/genietv.c b/board/genietv/genietv.c
index 8f32ad7..a5e64b3 100644
--- a/board/genietv/genietv.c
+++ b/board/genietv/genietv.c
@@ -49,9 +49,9 @@ const uint sdram_table[] =
/*
* SDRAM Initialization (offset 5 in UPMB RAM)
*
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
+ * This is no UPM entry point. The following definition uses
+ * the remaining space to establish an initialization
+ * sequence, which is executed by a RUN command.
*
*/
0x1FFDDC34, 0xEFEEAC34, 0x1FBD5C35, /* last */
@@ -198,21 +198,21 @@ long int initdram (int board_type)
if (size_b1 > 0)
{
- /*
- * Position Bank 1 immediately above Bank 0
- */
- memctl->memc_or2 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
- memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) +
- (size_b0 & BR_BA_MSK);
+ /*
+ * Position Bank 1 immediately above Bank 0
+ */
+ memctl->memc_or2 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
+ memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) +
+ (size_b0 & BR_BA_MSK);
}
else
{
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br2 = 0;
+ /*
+ * No bank 1
+ *
+ * invalidate bank
+ */
+ memctl->memc_br2 = 0;
/* adjust refresh rate depending on SDRAM type, one bank */
memctl->memc_mptpr = CFG_MPTPR_1BK_4K;
}
diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds
index 451d853..276e2b4 100644
--- a/board/genietv/u-boot.lds
+++ b/board/genietv/u-boot.lds
@@ -108,6 +108,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
@@ -135,4 +140,3 @@ SECTIONS
_end = . ;
PROVIDE (end = .);
}
-
diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug
index aaf58f0..749817d 100644
--- a/board/genietv/u-boot.lds.debug
+++ b/board/genietv/u-boot.lds.debug
@@ -107,6 +107,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
@@ -134,4 +139,3 @@ SECTIONS
_end = . ;
PROVIDE (end = .);
}
-