diff options
author | Minkyu Kang <mk7.kang@samsung.com> | 2009-10-30 12:14:40 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2009-10-30 12:14:40 +0900 |
commit | 0bf7de838096e804f0cece8f2d94905477381b6e (patch) | |
tree | fc57495ade62aeba85b935353955a28444e5b65b /board/gdsys | |
parent | d43bc3d2d09022bcffa1302b8f51e7fabe2dc68a (diff) | |
parent | 4bc3d2afb380e78fdbb9c501d9a8da6d59eb178e (diff) | |
download | u-boot-imx-0bf7de838096e804f0cece8f2d94905477381b6e.zip u-boot-imx-0bf7de838096e804f0cece8f2d94905477381b6e.tar.gz u-boot-imx-0bf7de838096e804f0cece8f2d94905477381b6e.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
board/eukrea/cpu9260/cpu9260.c
drivers/serial/serial_s5pc1xx.c
include/asm-arm/arch-s5pc1xx/clock.h
include/asm-arm/arch-s5pc1xx/gpio.h
include/asm-arm/arch-s5pc1xx/pwm.h
include/asm-arm/arch-s5pc1xx/uart.h
include/configs/cpu9260.h
include/configs/cpuat91.h
include/configs/davinci_dm355evm.h
include/linux/mtd/samsung_onenand.h
Diffstat (limited to 'board/gdsys')
-rw-r--r-- | board/gdsys/dlvision/u-boot.lds | 1 | ||||
-rw-r--r-- | board/gdsys/gdppc440etx/gdppc440etx.c | 32 | ||||
-rw-r--r-- | board/gdsys/gdppc440etx/u-boot.lds | 1 | ||||
-rw-r--r-- | board/gdsys/intip/intip.c | 22 | ||||
-rw-r--r-- | board/gdsys/intip/u-boot.lds | 1 | ||||
-rw-r--r-- | board/gdsys/neo/u-boot.lds | 1 |
6 files changed, 27 insertions, 31 deletions
diff --git a/board/gdsys/dlvision/u-boot.lds b/board/gdsys/dlvision/u-boot.lds index d803625..689c808 100644 --- a/board/gdsys/dlvision/u-boot.lds +++ b/board/gdsys/dlvision/u-boot.lds @@ -60,7 +60,6 @@ SECTIONS cpu/ppc4xx/start.o (.text) *(.text) - *(.fixup) *(.got1) } _etext = .; diff --git a/board/gdsys/gdppc440etx/gdppc440etx.c b/board/gdsys/gdppc440etx/gdppc440etx.c index 7cc1bf2..90dbe52 100644 --- a/board/gdsys/gdppc440etx/gdppc440etx.c +++ b/board/gdsys/gdppc440etx/gdppc440etx.c @@ -239,22 +239,22 @@ void pci_target_init(struct pci_controller *hose) * Use byte reversed out routines to handle endianess. * Make this region non-prefetchable. */ - out32r(PCIX0_PMM0MA, 0x00000000); /* disabled b4 setting */ - out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); - out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); - out32r(PCIX0_PMM0PCIHA, 0x00000000); - out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M, no prefetch, enable region */ - - out32r(PCIX0_PMM1MA, 0x00000000); /* disabled b4 setting */ - out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); - out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); - out32r(PCIX0_PMM1PCIHA, 0x00000000); - out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M, no prefetch, enable region */ - - out32r(PCIX0_PTM1MS, 0x00000001); - out32r(PCIX0_PTM1LA, 0); - out32r(PCIX0_PTM2MS, 0); - out32r(PCIX0_PTM2LA, 0); + out32r(PCIL0_PMM0MA, 0x00000000); /* disabled b4 setting */ + out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); + out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); + out32r(PCIL0_PMM0PCIHA, 0x00000000); + out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M, no prefetch, enable region */ + + out32r(PCIL0_PMM1MA, 0x00000000); /* disabled b4 setting */ + out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); + out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); + out32r(PCIL0_PMM1PCIHA, 0x00000000); + out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M, no prefetch, enable region */ + + out32r(PCIL0_PTM1MS, 0x00000001); + out32r(PCIL0_PTM1LA, 0); + out32r(PCIL0_PTM2MS, 0); + out32r(PCIL0_PTM2LA, 0); /* * Set up Configuration registers diff --git a/board/gdsys/gdppc440etx/u-boot.lds b/board/gdsys/gdppc440etx/u-boot.lds index 77f0aae..6ab36ee 100644 --- a/board/gdsys/gdppc440etx/u-boot.lds +++ b/board/gdsys/gdppc440etx/u-boot.lds @@ -69,7 +69,6 @@ SECTIONS board/gdsys/gdppc440etx/init.o (.text) *(.text) - *(.fixup) *(.got1) } _etext = .; diff --git a/board/gdsys/intip/intip.c b/board/gdsys/intip/intip.c index 2cd2e6d..b42e908 100644 --- a/board/gdsys/intip/intip.c +++ b/board/gdsys/intip/intip.c @@ -154,27 +154,27 @@ void pci_target_init(struct pci_controller *hose) /* * Disable everything */ - out_le32((void *)PCIX0_PIM0SA, 0); /* disable */ - out_le32((void *)PCIX0_PIM1SA, 0); /* disable */ - out_le32((void *)PCIX0_PIM2SA, 0); /* disable */ - out_le32((void *)PCIX0_EROMBA, 0); /* disable expansion rom */ + out_le32((void *)PCIL0_PIM0SA, 0); /* disable */ + out_le32((void *)PCIL0_PIM1SA, 0); /* disable */ + out_le32((void *)PCIL0_PIM2SA, 0); /* disable */ + out_le32((void *)PCIL0_EROMBA, 0); /* disable expansion rom */ /* * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 * strapping options to not support sizes such as 128/256 MB. */ - out_le32((void *)PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE); - out_le32((void *)PCIX0_PIM0LAH, 0); - out_le32((void *)PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1); - out_le32((void *)PCIX0_BAR0, 0); + out_le32((void *)PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE); + out_le32((void *)PCIL0_PIM0LAH, 0); + out_le32((void *)PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1); + out_le32((void *)PCIL0_BAR0, 0); /* * Program the board's subsystem id/vendor id */ - out_le16((void *)PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID); - out_le16((void *)PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID); + out_le16((void *)PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID); + out_le16((void *)PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID); - out_le16((void *)PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY); + out_le16((void *)PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY); } #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ diff --git a/board/gdsys/intip/u-boot.lds b/board/gdsys/intip/u-boot.lds index c1cbd1c..624c4c1 100644 --- a/board/gdsys/intip/u-boot.lds +++ b/board/gdsys/intip/u-boot.lds @@ -69,7 +69,6 @@ SECTIONS board/gdsys/intip/init.o (.text) *(.text) - *(.fixup) *(.got1) } _etext = .; diff --git a/board/gdsys/neo/u-boot.lds b/board/gdsys/neo/u-boot.lds index b95eb5c..75202ca 100644 --- a/board/gdsys/neo/u-boot.lds +++ b/board/gdsys/neo/u-boot.lds @@ -60,7 +60,6 @@ SECTIONS cpu/ppc4xx/start.o (.text) *(.text) - *(.fixup) *(.got1) } _etext = .; |