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author | Wolfgang Denk <wd@denx.de> | 2011-12-07 09:07:28 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-12-07 09:07:28 +0100 |
commit | 99dee4b2ef570f289e2b1f105df0fdb8ad57ebd1 (patch) | |
tree | e46d8c008a16f782dd259952b55416f9f0e4f9ad /board/freescale | |
parent | 9294fd60ae273cc7a2759a48a081a5cc655ddf23 (diff) | |
parent | 4497861ae7e52dda4dd13db860df4cc0fa7dd852 (diff) | |
download | u-boot-imx-99dee4b2ef570f289e2b1f105df0fdb8ad57ebd1.zip u-boot-imx-99dee4b2ef570f289e2b1f105df0fdb8ad57ebd1.tar.gz u-boot-imx-99dee4b2ef570f289e2b1f105df0fdb8ad57ebd1.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
p2041rdb: fix serdes clock map
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/p2041rdb/p2041rdb.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 6461bd7..1f6a34b 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -83,10 +83,12 @@ int checkboard(void) puts("SERDES Reference Clocks: "); sw = in_8(&CPLD_SW(2)) >> 2; for (i = 0; i < 2; i++) { - static const char * const freq[] = {"0", "100", "125"}; + static const char * const freq[][3] = {{"0", "100", "125"}, + {"100", "156.25", "125"} + }; unsigned int clock = (sw >> (2 * i)) & 3; - printf("Bank%u=%sMhz ", i+1, freq[clock]); + printf("Bank%u=%sMhz ", i+1, freq[i][clock]); } puts("\n"); @@ -166,22 +168,25 @@ int misc_init_r(void) u32 actual[NUM_SRDS_BANKS]; unsigned int i; u8 sw; + static const int freq[][3] = { + {0, SRDS_PLLCR0_RFCK_SEL_100, SRDS_PLLCR0_RFCK_SEL_125}, + {SRDS_PLLCR0_RFCK_SEL_100, SRDS_PLLCR0_RFCK_SEL_156_25, + SRDS_PLLCR0_RFCK_SEL_125} + }; sw = in_8(&CPLD_SW(2)) >> 2; for (i = 0; i < NUM_SRDS_BANKS; i++) { unsigned int clock = (sw >> (2 * i)) & 3; - switch (clock) { - case 1: - actual[i] = SRDS_PLLCR0_RFCK_SEL_100; - break; - case 2: - actual[i] = SRDS_PLLCR0_RFCK_SEL_125; - break; - default: + if (clock == 0x3) { printf("Warning: SDREFCLK%u switch setting of '11' is " "unsupported\n", i + 1); break; } + if (i == 0 && clock == 0) + puts("Warning: SDREFCLK1 switch setting of" + "'00' is unsupported\n"); + else + actual[i] = freq[i][clock]; } for (i = 0; i < NUM_SRDS_BANKS; i++) { |