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| author | Adrian Alonso <adrian.alonso@nxp.com> | 2016-11-29 13:30:10 -0600 |
|---|---|---|
| committer | Adrian Alonso <adrian.alonso@nxp.com> | 2016-12-01 11:30:01 -0600 |
| commit | 977a06025b97569fdd43781961b3f90344eab737 (patch) | |
| tree | e9c01f2b7bd013fa05464973a81328154f2e4b96 /board/freescale | |
| parent | c9483905bc4ef6d912f96a4324fc60fd6aabcca6 (diff) | |
| download | u-boot-imx-977a06025b97569fdd43781961b3f90344eab737.zip u-boot-imx-977a06025b97569fdd43781961b3f90344eab737.tar.gz u-boot-imx-977a06025b97569fdd43781961b3f90344eab737.tar.bz2 | |
MLK-13551: mx6ull: evk: lpddr2: add pre charge command all
LPDDR2 script IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc
Updated to add precharge all command per JEDEC
The memory controller may optionally issue a precharge-all command
prior to the MRW reset command
This is strongly recommended to ensure robust DRAM initialization
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx6ullevk/imximage_lpddr2.cfg | 1 | ||||
| -rw-r--r-- | board/freescale/mx6ullevk/plugin.S | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/board/freescale/mx6ullevk/imximage_lpddr2.cfg b/board/freescale/mx6ullevk/imximage_lpddr2.cfg index dedabfc..fe82cac 100644 --- a/board/freescale/mx6ullevk/imximage_lpddr2.cfg +++ b/board/freescale/mx6ullevk/imximage_lpddr2.cfg @@ -105,6 +105,7 @@ DATA 4 0x021B002C 0x0F9F26D2 DATA 4 0x021B0030 0x009F0010 DATA 4 0x021B0040 0x00000047 DATA 4 0x021B0000 0x83100000 +DATA 4 0x021B001C 0x00008050 DATA 4 0x021B001C 0x003F8030 DATA 4 0x021B001C 0xFF0A8030 DATA 4 0x021B001C 0x82018030 diff --git a/board/freescale/mx6ullevk/plugin.S b/board/freescale/mx6ullevk/plugin.S index 0c303fba..f3d5163 100644 --- a/board/freescale/mx6ullevk/plugin.S +++ b/board/freescale/mx6ullevk/plugin.S @@ -204,6 +204,8 @@ str r1, [r0, #0x040] ldr r1, =0x83100000 str r1, [r0, #0x000] + ldr r1, =0x00008050 + str r1, [r0, #0x01C] ldr r1, =0x003F8030 str r1, [r0, #0x01C] ldr r1, =0xFF0A8030 |