diff options
| author | Ye Li <ye.li@nxp.com> | 2016-11-08 10:39:33 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-11-08 13:45:13 +0800 |
| commit | 0c56b6814333f2ac1c2462d8a1aed8df07ad403d (patch) | |
| tree | 771f9063ace0d3c0e5e0b38cd643a28eb1bdc31b /board/freescale | |
| parent | 03b2d94b925cf12d627527af2cd08054bb15dd4e (diff) | |
| download | u-boot-imx-0c56b6814333f2ac1c2462d8a1aed8df07ad403d.zip u-boot-imx-0c56b6814333f2ac1c2462d8a1aed8df07ad403d.tar.gz u-boot-imx-0c56b6814333f2ac1c2462d8a1aed8df07ad403d.tar.bz2 | |
MLK-13440-3 mx6sll_arm2: Update USDHC2 parameter for using 1.8V I/O
Set the vs18_enable field to 1 for USDHC2 controller which connects to eMMC.
Also remove the explicit USDCH2 vendorspec register settings in board codes,
since the driver will take charge of it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx6sll_arm2/mx6sll_arm2.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/board/freescale/mx6sll_arm2/mx6sll_arm2.c b/board/freescale/mx6sll_arm2/mx6sll_arm2.c index 9094586..a07e147 100644 --- a/board/freescale/mx6sll_arm2/mx6sll_arm2.c +++ b/board/freescale/mx6sll_arm2/mx6sll_arm2.c @@ -180,7 +180,7 @@ static void setup_iomux_uart(void) #ifdef CONFIG_FSL_ESDHC static struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC1_BASE_ADDR, 0, 8, 1}, - {USDHC2_BASE_ADDR, 0, 8}, + {USDHC2_BASE_ADDR, 0, 8, 0, 1}, /* fixed 1.8v IO voltage for eMMC chip */ {USDHC3_BASE_ADDR, 0, 4}, }; @@ -220,7 +220,7 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { - int i, ret; + int i; /* * According to the board_mmc_init() the following map is done: @@ -241,10 +241,6 @@ int board_mmc_init(bd_t *bis) imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - /* eMMC connect to 1.8v, so need to set eMMC I/O voltage to 1.8v */ - ret = readl(usdhc_cfg[1].esdhc_base + 0xc0); /* vend_spec */ - ret |= 0x2; - writel(ret, (usdhc_cfg[1].esdhc_base + 0xc0)); gpio_direction_output(USDHC2_PWR_GPIO, 1); break; case 2: |