diff options
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-04-18 16:43:39 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-04-22 17:58:52 -0700 |
| commit | b19e288f47ea7db98eefbebdda0fe0fad66d845c (patch) | |
| tree | 1154266ccb7c320ae5be58f55b34f4eba651167c /board/freescale/t208xqds/ddr.c | |
| parent | d1c561cd546353686b28199bf9a90810805c7ada (diff) | |
| download | u-boot-imx-b19e288f47ea7db98eefbebdda0fe0fad66d845c.zip u-boot-imx-b19e288f47ea7db98eefbebdda0fe0fad66d845c.tar.gz u-boot-imx-b19e288f47ea7db98eefbebdda0fe0fad66d845c.tar.bz2 | |
board/t208xqds: Add support of 2-stage NAND/SPI/SD boot
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework.
PBL initializes the internal CPC-SRAM and copy SPL(160K) to it,
SPL further initializes DDR using SPD and environment and copy
u-boot(768 KB) from SPI/SD/NAND to DDR, finally SPL transfers
control to u-boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix boards.cfg for T2081QDS_SDCARD and _SPIFLASH]
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t208xqds/ddr.c')
| -rw-r--r-- | board/freescale/t208xqds/ddr.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c index ed1334d..3348971 100644 --- a/board/freescale/t208xqds/ddr.c +++ b/board/freescale/t208xqds/ddr.c @@ -107,13 +107,16 @@ phys_size_t initdram(int board_type) { phys_size_t dram_size; +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL) puts("Initializing....using SPD\n"); - dram_size = fsl_ddr_sdram(); dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; +#else + /* DDR has been initialised by first stage boot loader */ + dram_size = fsl_ddr_sdram_size(); +#endif - puts(" DDR: "); return dram_size; } |