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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-10 14:31:56 +0100 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-10 22:23:59 +0100 |
commit | f15ea6e1d67782a1626d4a4922b6c20e380085e5 (patch) | |
tree | 57d78f1ee94a2060eaa591533278d2934d4f1da3 /board/freescale/t104xrdb/t104xrdb.c | |
parent | cb7ee1b98cac6baf244daefb1192adf5a47bc983 (diff) | |
parent | f44483b57c49282299da0e5c10073b909cdad979 (diff) | |
download | u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.zip u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.tar.gz u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.tar.bz2 |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
Diffstat (limited to 'board/freescale/t104xrdb/t104xrdb.c')
-rw-r--r-- | board/freescale/t104xrdb/t104xrdb.c | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c new file mode 100644 index 0000000..6e29d64 --- /dev/null +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -0,0 +1,93 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <netdev.h> +#include <linux/compiler.h> +#include <asm/mmu.h> +#include <asm/processor.h> +#include <asm/cache.h> +#include <asm/immap_85xx.h> +#include <asm/fsl_law.h> +#include <asm/fsl_serdes.h> +#include <asm/fsl_portals.h> +#include <asm/fsl_liodn.h> +#include <fm_eth.h> + +#include "t104xrdb.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + struct cpu_type *cpu = gd->arch.cpu; + + printf("Board: %sRDB\n", cpu->name); + return 0; +} + +int board_early_init_r(void) +{ +#ifdef CONFIG_SYS_FLASH_BASE + const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; + const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); + + /* + * Remap Boot flash region to caching-inhibited + * so that flash can be erased properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* invalidate existing TLB entry for flash */ + disable_tlb(flash_esel); + + set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, flash_esel, BOOKE_PAGESZ_256M, 1); +#endif + set_liodns(); +#ifdef CONFIG_SYS_DPAA_QBMAN + setup_portals(); +#endif + + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + phys_addr_t base; + phys_size_t size; + + ft_cpu_setup(blob, bd); + + base = getenv_bootm_low(); + size = getenv_bootm_size(); + + fdt_fixup_memory(blob, (u64)base, (u64)size); + +#ifdef CONFIG_PCI + pci_of_setup(blob, bd); +#endif + + fdt_fixup_liodn(blob); + +#ifdef CONFIG_HAS_FSL_DR_USB + fdt_fixup_dr_usb(blob, bd); +#endif + +#ifdef CONFIG_SYS_DPAA_FMAN + fdt_fixup_fman_ethernet(blob); +#endif +} |