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authorChin Liang See <clsee@altera.com>2013-08-07 10:08:03 -0500
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-06 12:09:06 +0200
commit68e1747f9c0506159e8ecc9a4feb58e9c65a7b39 (patch)
treec4b1a1ba9d50e05a3839b51a8f4cbeeb6762f3fd /board/freescale/p1_p2_rdb/p1_p2_rdb.c
parent31ad864e47f03288bf1d4232913b38ddb624345c (diff)
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socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
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