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| author | Wolfgang Denk <wd@denx.de> | 2010-06-30 01:02:11 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-06-30 01:02:11 +0200 |
| commit | 0a9463e93537a68e7246714f43fb69eca0b7b214 (patch) | |
| tree | cec01ecc6502a65cbbbda406dfac23b93c093899 /board/freescale/p1_p2_rdb/ddr.c | |
| parent | 955ea6fc2749a4305395758fc797cf8c11dcbed7 (diff) | |
| parent | bde3892edac99bf974e5b9809a112a6ce530be03 (diff) | |
| download | u-boot-imx-0a9463e93537a68e7246714f43fb69eca0b7b214.zip u-boot-imx-0a9463e93537a68e7246714f43fb69eca0b7b214.tar.gz u-boot-imx-0a9463e93537a68e7246714f43fb69eca0b7b214.tar.bz2 | |
Merge branch 'master' into next
Diffstat (limited to 'board/freescale/p1_p2_rdb/ddr.c')
| -rw-r--r-- | board/freescale/p1_p2_rdb/ddr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index fccc4f8..15b46b0 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -76,7 +76,7 @@ extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #define CONFIG_SYS_DDR_TIMING_0_667 0x55770802 #define CONFIG_SYS_DDR_TIMING_1_667 0x5f599543 #define CONFIG_SYS_DDR_TIMING_2_667 0x0fa074d1 -#define CONFIG_SYS_DDR_CLK_CTRL_667 0x02800000 +#define CONFIG_SYS_DDR_CLK_CTRL_667 0x03000000 #define CONFIG_SYS_DDR_MODE_1_667 0x00040852 #define CONFIG_SYS_DDR_MODE_2_667 0x00000000 #define CONFIG_SYS_DDR_INTERVAL_667 0x0a280100 |