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authorBai Ping <b51503@freescale.com>2015-10-09 21:04:01 +0800
committerBai Ping <b51503@freescale.com>2015-10-13 01:06:10 +0800
commit8b7464a118af5f2bf3bee2561901d44c80f518ba (patch)
treefe62073f8fafbfc9f3f9bd10f4ab7e1d8ac7169c /board/freescale/mx7d_12x12_ddr3_arm2
parentddeb7aee6f182ec9bc5593b4a5c1210999fab349 (diff)
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MLK-11675 ARM: imx: change the VDD_SOC normal voltage to 0.975V
According to the latest datasheet(Rev. C Draft 1, 10/2015) of i.MX7D, change the VDD_SOC voltage to 0.95V in run mode, and add a 25mV margin to cover the IR drop and board tolerance. So setting VDD_SOC voltage to 0.975V. Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'board/freescale/mx7d_12x12_ddr3_arm2')
-rw-r--r--board/freescale/mx7d_12x12_ddr3_arm2/mx7d_12x12_ddr3_arm2.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/mx7d_12x12_ddr3_arm2/mx7d_12x12_ddr3_arm2.c b/board/freescale/mx7d_12x12_ddr3_arm2/mx7d_12x12_ddr3_arm2.c
index 19d1ebb..b43a618 100644
--- a/board/freescale/mx7d_12x12_ddr3_arm2/mx7d_12x12_ddr3_arm2.c
+++ b/board/freescale/mx7d_12x12_ddr3_arm2/mx7d_12x12_ddr3_arm2.c
@@ -326,6 +326,12 @@ int power_init_board(void)
pmic_reg_write(p, PFUZE300_SW1ASTBY, reg);
pmic_reg_write(p, PFUZE300_SW1BSTBY, reg);
+ /* decrease SW1B normal voltage to 0.975V */
+ pmic_reg_read(p, PFUZE300_SW1BVOLT, &reg);
+ reg &= ~0x1f;
+ reg |= PFUZE300_SW1AB_SETP(975);
+ pmic_reg_write(p, PFUZE300_SW1BVOLT, reg);
+
return 0;
}
#endif