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| author | Ye Li <ye.li@nxp.com> | 2016-03-02 11:18:01 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2016-03-04 15:53:41 +0800 |
| commit | 2f8eaed32b99e436c085802322407f990c43ee05 (patch) | |
| tree | b273299d68febc01bebd44fe1c4d52e8e06f26af /board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | |
| parent | 952524c736c5831ee7faa8351b6ed4f6f44b73ba (diff) | |
| download | u-boot-imx-2f8eaed32b99e436c085802322407f990c43ee05.zip u-boot-imx-2f8eaed32b99e436c085802322407f990c43ee05.tar.gz u-boot-imx-2f8eaed32b99e436c085802322407f990c43ee05.tar.bz2 | |
MLK-12483-5 mx6ul: Enable module fuse check EVK board and DDR3 ARM2 board
Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit f9d57bc73807d14062721a793a2a55be69aa4973)
Diffstat (limited to 'board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c')
| -rw-r--r-- | board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index b5c3374..01f5699 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -488,11 +488,17 @@ int mmc_get_env_devno(void) /* BOOT_CFG2[3] and BOOT_CFG2[4] */ dev_no = (soc_sbmr & 0x00001800) >> 11; + if (dev_no == 1 && mx6_esdhc_fused(USDHC1_BASE_ADDR)) + dev_no = 0; + return dev_no; } int mmc_map_to_kernel_blk(int dev_no) { + if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR)) + dev_no = 1; + return dev_no; } @@ -570,7 +576,6 @@ int board_mmc_init(bd_t *bis) ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); if (ret) { printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; } } @@ -750,10 +755,18 @@ static int setup_fec(int fec_id) int ret; if (0 == fec_id) { + if (check_module_fused(MX6_MODULE_ENET1)) { + return -1; + } + /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); } else { + if (check_module_fused(MX6_MODULE_ENET2)) { + return -1; + } + /* Use 50M anatop loopback REF_CLK2 for ENET2, clear gpr1[14], set gpr1[18]*/ clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); |