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| author | Nitin Garg <nitin.garg@freescale.com> | 2014-05-28 15:09:28 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-06-13 10:17:01 -0500 |
| commit | b829539252202cefe5ccdc22d304eb3c8856e961 (patch) | |
| tree | 902ee6fb4c608d9088b3689784d3bb93c4de1ad8 /board/freescale/mx6slevk | |
| parent | 230871db5538f69c101db7d5695c37f282bd641d (diff) | |
| download | u-boot-imx-b829539252202cefe5ccdc22d304eb3c8856e961.zip u-boot-imx-b829539252202cefe5ccdc22d304eb3c8856e961.tar.gz u-boot-imx-b829539252202cefe5ccdc22d304eb3c8856e961.tar.bz2 | |
ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access support
Add BSP codes to support SPI NOR flash read, write and erase by using
"sf" command.
In addition, add a new configuration "mx6slevk_spinor" for building
the uboot that can be booted from SPI NOR flash and stored the
environments variables in it.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'board/freescale/mx6slevk')
| -rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 1c433c2..3fb6991 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -42,6 +42,10 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ @@ -197,6 +201,22 @@ static void setup_iomux_fec(void) gpio_set_value(ETH_PHY_RESET, 1); } +#ifdef CONFIG_SYS_USE_SPINOR +iomux_v3_cfg_t const ecspi1_pads[] = { + MX6_PAD_ECSPI1_SCLK__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_MISO__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_MOSI__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_SS0__GPIO_4_11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +void setup_spinor(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); + gpio_direction_output(IMX_GPIO_NR(4, 11), 0); +} +#endif + #ifdef CONFIG_FSL_ESDHC #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7) @@ -694,6 +714,11 @@ void ldo_mode_set(int ldo_bypass) int board_early_init_f(void) { setup_iomux_uart(); + +#ifdef CONFIG_SYS_USE_SPINOR + setup_spinor(); +#endif + return 0; } |