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author | Peng Fan <Peng.Fan@freescale.com> | 2015-03-19 10:10:07 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2016-03-25 11:50:25 +0800 |
commit | 8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce (patch) | |
tree | 012e2179dfb9de215a818ab5cd0b8366f35ca7bb /board/freescale/mx6sabresd | |
parent | ff3923f294cc2e15f436d7520b4042736b1b48a6 (diff) | |
download | u-boot-imx-8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce.zip u-boot-imx-8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce.tar.gz u-boot-imx-8dcbd43b971616fb67dc3b2af32e2d33f68ed0ce.tar.bz2 |
MLK-10774-2 HDMI: splash screen function enhancement
-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5028519b434d5dfbe53c48ac4b115ff8b69bbac7)
Diffstat (limited to 'board/freescale/mx6sabresd')
-rw-r--r-- | board/freescale/mx6sabresd/mx6sabresd.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index e9d9664..e0a79cb 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2016 Freescale Semiconductor, Inc. * * Author: Fabio Estevam <fabio.estevam@freescale.com> * @@ -404,16 +404,16 @@ struct display_info_t const displays[] = {{ .mode = { .name = "HDMI", .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, + .xres = 640, + .yres = 480, + .pixclock = 39721, + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, .vmode = FB_VMODE_NONINTERLACED } }, { .bus = 0, |