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| author | Ye Li <ye.li@nxp.com> | 2016-03-07 15:37:34 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 14:04:41 +0800 |
| commit | 8f8699a8845c3f1a838d0e8a258ceebcc60f5622 (patch) | |
| tree | 9bb37fa7e1d5b846e87e59c0ad6cdf94f882153b /board/freescale/mx6qsabreauto/mx6qsabreauto.c | |
| parent | e1c8247f3460cc5742d4470731581f79d3a64198 (diff) | |
| download | u-boot-imx-8f8699a8845c3f1a838d0e8a258ceebcc60f5622.zip u-boot-imx-8f8699a8845c3f1a838d0e8a258ceebcc60f5622.tar.gz u-boot-imx-8f8699a8845c3f1a838d0e8a258ceebcc60f5622.tar.bz2 | |
MLK-12495 mx6: Add LDO bypass support
Port LDO bypass support from v2015 to support the features:
1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
reboot whole board, so split these code to independent function so that board file
can call it freely.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
Diffstat (limited to 'board/freescale/mx6qsabreauto/mx6qsabreauto.c')
| -rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index e0ff4fc..de68caf 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -785,6 +785,44 @@ int power_init_board(void) return 0; } +#ifdef CONFIG_LDO_BYPASS_CHECK +void ldo_mode_set(int ldo_bypass) +{ + unsigned int value; + struct pmic *p = pmic_get("PFUZE100"); + + if (!p) { + printf("No PMIC found!\n"); + return; + } + + /* increase VDDARM/VDDSOC to support 1.2G chip */ + if (check_1_2G()) { + ldo_bypass = 0; /* ldo_enable on 1.2G chip */ + printf("1.2G chip, increase VDDARM_IN/VDDSOC_IN\n"); + + if (is_mx6dqp()) { + /* increase VDDARM to 1.425V */ + pmic_reg_read(p, PFUZE100_SW2VOL, &value); + value &= ~0x3f; + value |= 0x29; + pmic_reg_write(p, PFUZE100_SW2VOL, value); + } else { + /* increase VDDARM to 1.425V */ + pmic_reg_read(p, PFUZE100_SW1ABVOL, &value); + value &= ~0x3f; + value |= 0x2d; + pmic_reg_write(p, PFUZE100_SW1ABVOL, value); + } + /* increase VDDSOC to 1.425V */ + pmic_reg_read(p, PFUZE100_SW1CVOL, &value); + value &= ~0x3f; + value |= 0x2d; + pmic_reg_write(p, PFUZE100_SW1CVOL, value); + } +} +#endif + #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ |