diff options
author | Sammy He <r62914@freescale.com> | 2009-11-16 11:59:54 +0800 |
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committer | Sammy He <r62914@freescale.com> | 2009-11-20 17:14:44 +0800 |
commit | 1701c3caa7ed7d183a57301f6513c1f5fb4102cd (patch) | |
tree | 6146e2b73d560b8b5225047cc922b6ce6fd2037d /board/freescale/mx25_3stack | |
parent | cbee64d544a2bd8b5e2ae17bcfdfe79480690292 (diff) | |
download | u-boot-imx-1701c3caa7ed7d183a57301f6513c1f5fb4102cd.zip u-boot-imx-1701c3caa7ed7d183a57301f6513c1f5fb4102cd.tar.gz u-boot-imx-1701c3caa7ed7d183a57301f6513c1f5fb4102cd.tar.bz2 |
ENGR00118576 MX25: Support Smc911x ethernet
1. Add imx cspi support for cpld access.
2. Add smc911x ethernet support from cpld.
Signed-off-by: Sammy He <r62914@freescale.com>
Diffstat (limited to 'board/freescale/mx25_3stack')
-rw-r--r-- | board/freescale/mx25_3stack/mx25_3stack.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/board/freescale/mx25_3stack/mx25_3stack.c b/board/freescale/mx25_3stack/mx25_3stack.c index be1c571..b28cc3d 100644 --- a/board/freescale/mx25_3stack/mx25_3stack.c +++ b/board/freescale/mx25_3stack/mx25_3stack.c @@ -31,6 +31,7 @@ #include <asm/arch/mx25_pins.h> #include <asm/arch/iomux.h> #include <asm/arch/gpio.h> +#include <imx_spi.h> #ifdef CONFIG_CMD_MMC #include <mmc.h> @@ -160,11 +161,28 @@ int board_mmc_init(void) } #endif -int board_init(void) +void spi_io_init(struct imx_spi_dev_t *dev) { - int pad; - u8 reg[4]; + switch (dev->base) { + case CSPI1_BASE: + writel(0, IOMUXC_BASE + 0x180); /* CSPI1 SCLK */ + writel(0x1C0, IOMUXC_BASE + 0x5c4); + writel(0, IOMUXC_BASE + 0x184); /* SPI_RDY */ + writel(0x1E0, IOMUXC_BASE + 0x5c8); + writel(0, IOMUXC_BASE + 0x170); /* MOSI */ + writel(0x1C0, IOMUXC_BASE + 0x5b4); + writel(0, IOMUXC_BASE + 0x174); /* MISO */ + writel(0x1C0, IOMUXC_BASE + 0x5b8); + writel(0, IOMUXC_BASE + 0x17C); /* SS1 */ + writel(0x1E0, IOMUXC_BASE + 0x5C0); + break; + default: + break; + } +} +int board_init(void) +{ setup_soc_rev(); /* setup pins for UART1 */ @@ -265,6 +283,12 @@ int board_late_init(void) /* Turn PMIC On*/ reg[0] = 0x09; i2c_write(0x54, 0x02, 1, reg, 1); + +#ifdef CONFIG_IMX_SPI_CPLD + mxc_cpld_spi_init(); +#endif + + return 0; } #endif |