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authorPeter Tyser <ptyser@xes-inc.com>2009-07-17 10:14:45 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-07-22 09:43:47 -0500
commite7ee23ec1788d8cf269a4cf6b9cd3722cbc7d592 (patch)
treed849696bd6a8c4f4f561381bbec53b5c82f5dacf /board/freescale/mpc8610hpcd
parentf6155c6fbb1d85f517b7c160570f0995ef14c43f (diff)
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86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8610hpcd')
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index a85ebea..419b2c1 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -154,7 +154,7 @@ phys_size_t fixed_sdram(void)
ddr->timing_cfg_0 = 0x00260802;
ddr->timing_cfg_1 = 0x3935d322;
ddr->timing_cfg_2 = 0x14904cc8;
- ddr->sdram_mode_1 = 0x00480432;
+ ddr->sdram_mode = 0x00480432;
ddr->sdram_mode_2 = 0x00000000;
ddr->sdram_interval = 0x06180fff; /* 0x06180100; */
ddr->sdram_data_init = 0xDEADBEEF;
@@ -170,7 +170,7 @@ phys_size_t fixed_sdram(void)
udelay(500);
- ddr->sdram_cfg_1 = 0xc3000000; /* 0xe3008000;*/
+ ddr->sdram_cfg = 0xc3000000; /* 0xe3008000;*/
#if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)