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| author | Minkyu Kang <mk7.kang@samsung.com> | 2010-01-19 09:12:48 +0900 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-01-19 09:12:48 +0900 |
| commit | b097d552bc9ee0351bb0c3d1219856e845df59f9 (patch) | |
| tree | 3b2b8391ec989d9a8b561ce8234dde3b1d481880 /board/freescale/mpc8572ds/mpc8572ds.c | |
| parent | e598dfc22c8789991d165714bec53b2390fc999d (diff) | |
| parent | a7709d926dbc7cb1541034fcf2b21ce3e838cb12 (diff) | |
| download | u-boot-imx-b097d552bc9ee0351bb0c3d1219856e845df59f9.zip u-boot-imx-b097d552bc9ee0351bb0c3d1219856e845df59f9.tar.gz u-boot-imx-b097d552bc9ee0351bb0c3d1219856e845df59f9.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'board/freescale/mpc8572ds/mpc8572ds.c')
| -rw-r--r-- | board/freescale/mpc8572ds/mpc8572ds.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 64e164b..74085c3 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -194,7 +194,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info[num], 3); pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs); printf (" PCIE3 connected to ULI as %s (base addr %lx)\n", - pcie_ep ? "End Point" : "Root Complex", + pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie3_hose, first_free_busno); @@ -226,7 +226,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info[num], 2); pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", - pcie_ep ? "End Point" : "Root Complex", + pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie2_hose, first_free_busno); @@ -246,7 +246,7 @@ void pci_init_board(void) SET_STD_PCIE_INFO(pci_info[num], 1); pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", - pcie_ep ? "End Point" : "Root Complex", + pcie_ep ? "Endpoint" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], &pcie1_hose, first_free_busno); |