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authorKumar Gala <galak@kernel.crashing.org>2009-09-02 09:03:08 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-09-08 09:10:07 -0500
commit3e7b6c1f2db5ec31f9e7dbc3e0cbca602167a46a (patch)
treea10000c36ecf3385327c86e27955a74718e67680 /board/freescale/mpc8572ds/mpc8572ds.c
parent5052a771cf1722c37c732f3c340775b55fbe3a22 (diff)
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ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8572ds/mpc8572ds.c')
-rw-r--r--board/freescale/mpc8572ds/mpc8572ds.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 7da70fe..c69934c 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -186,9 +186,8 @@ void pci_init_board(void)
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
struct pci_controller *hose = &pcie3_hose;
- int pcie_ep = (host_agent == 0) || (host_agent == 3) ||
- (host_agent == 5) || (host_agent == 6);
- int pcie_configured = (io_sel == 0x7);
+ int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent);
+ int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
struct pci_region *r = hose->regions;
u32 temp32;
@@ -252,9 +251,8 @@ void pci_init_board(void)
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
struct pci_controller *hose = &pcie2_hose;
- int pcie_ep = (host_agent == 2) || (host_agent == 4) ||
- (host_agent == 6) || (host_agent == 0);
- int pcie_configured = (io_sel == 0x3) || (io_sel == 0x7);
+ int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent);
+ int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
@@ -301,11 +299,8 @@ void pci_init_board(void)
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
struct pci_controller *hose = &pcie1_hose;
- int pcie_ep = (host_agent <= 1) || (host_agent == 4) ||
- (host_agent == 5);
- int pcie_configured = (io_sel == 0x2) || (io_sel == 0x3) ||
- (io_sel == 0x7) || (io_sel == 0xb) ||
- (io_sel == 0xc) || (io_sel == 0xf);
+ int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
+ int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){