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| author | Ye.Li <B37916@freescale.com> | 2015-04-04 14:46:05 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 15:05:41 +0800 |
| commit | 96711e399aa059e415759b3dfb3ad6dfe9454e84 (patch) | |
| tree | 2fcf5111c4ad766337697f22f076e893625270c0 /board/freescale/mpc8568mds/bcsr.h | |
| parent | 0aa551f44d53d3f2aa9efcf4374ccbedb00d10da (diff) | |
| download | u-boot-imx-96711e399aa059e415759b3dfb3ad6dfe9454e84.zip u-boot-imx-96711e399aa059e415759b3dfb3ad6dfe9454e84.tar.gz u-boot-imx-96711e399aa059e415759b3dfb3ad6dfe9454e84.tar.bz2 | |
MLK-10568 imx: mx7d arm2: Update LPDDR3 script to 7D_lpddr3_0_1.ds5
[The compass link for this script]
http://compass.freescale.net/livelink/livelinkfunc=ll&objid=233861153
&objAction=browse&sort=name
[Changes in the script]
1. Change the DDR freq to 528Mhz.
2. Disable ddr phy dll, just force a dll output. IC suspects the dll
in ddr phy may unlock sometimes. The side-effect is we will lost the
ability to compensate the voltage/temperature change, so it may easy
to fail at H/L temperature.
[DDR stress test result]
3 boards involved the two days stress test by using memtester tool.
One board met a kernel oops after one day test. Other two pass the
two days test.
Compared to previous DDR script, the result is much positive.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 843c3c54af12cbf20e7bc912178e5a3628b78198)
Diffstat (limited to 'board/freescale/mpc8568mds/bcsr.h')
0 files changed, 0 insertions, 0 deletions