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authorXie Xiaobo <r63061@freescale.com>2011-10-03 12:18:40 -0700
committerKumar Gala <galak@kernel.crashing.org>2011-10-09 17:57:54 -0500
commit8af3d22db9aaf1d05cd971940e577d420e9eae6f (patch)
treec9a7862a7302da370da48e39ac4abb929b5319a1 /board/freescale/mpc8536ds
parentae2044d8b30bf82fef5550497a0d4315edf6b62e (diff)
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powerpc/mpc8536ds: Invert SDHC_WP pin polarity
MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write protected pin polarity does not follow the SD card standard in MPC8536 Rev 1.0 silicon. The MPC8536DS board invert the SDHC_WP pin as a workaround. However, this silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board. Signed-off-by: Xie Xiaobo <r63061@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8536ds')
-rw-r--r--board/freescale/mpc8536ds/mpc8536ds.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 2beea34..c9f85c8 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -51,6 +51,14 @@ int board_early_init_f (void)
setbits_be32(&gur->pmuxcr,
(MPC85xx_PMUXCR_SDHC_CD |
MPC85xx_PMUXCR_SDHC_WP));
+
+ /* The MPC8536DS board insert the SDHC_WP pin for erratum NMG_eSDHC118,
+ * however, this erratum only applies to MPC8536 Rev1.0.
+ * So set SDHC_WP to active-low when use MPC8536 Rev1.1 and greater.*/
+ if ((((SVR_MAJ(get_svr()) & 0x7) == 0x1) &&
+ (SVR_MIN(get_svr()) >= 0x1))
+ || (SVR_MAJ(get_svr() & 0x7) > 0x1))
+ setbits_be32(&gur->gencfgr, MPC85xx_GENCFGR_SDHC_WP_INV);
#endif
return 0;
}