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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-09-11 21:35:36 +0400
committerKim Phillips <kim.phillips@freescale.com>2008-09-24 09:58:33 -0500
commitd26154c9a692586b66eb6d1f8e1b67c75e40ea70 (patch)
tree907998ee6fbf1b398b5db7596bb28941a540322f /board/freescale/mpc8349itx
parent8fd4166c467a46773f80208bda1ec3b4757747bc (diff)
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mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
The spd_dram code shifts the base address, then masks 20 bits, but forgets to shift the base address back. Fix this by just masking the base address correctly. Found this bug while trying to relocate a DDR memory at the base != 0. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/mpc8349itx')
-rw-r--r--board/freescale/mpc8349itx/mpc8349itx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index d3fc560..0a20e2b 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -55,7 +55,7 @@ int fixed_sdram(void)
im->sysconf.ddrlaw[0].ar =
LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
- im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
/* Only one CS0 for DDR */
im->ddr.csbnds[0].csbnds = 0x0000000f;