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authorPeter Tyser <ptyser@xes-inc.com>2010-09-14 19:13:50 -0500
committerWolfgang Denk <wd@denx.de>2010-09-23 21:14:42 +0200
commit6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9 (patch)
treed7fa66dbe49f468f0efaa94a0ad03507b46976f6 /board/freescale/mpc8315erdb/mpc8315erdb.c
parent9eda770b460161e6d6112c67cec0f46ec8d44921 (diff)
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83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/freescale/mpc8315erdb/mpc8315erdb.c')
-rw-r--r--board/freescale/mpc8315erdb/mpc8315erdb.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index d5e71dc..5dc558a 100644
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -140,7 +140,6 @@ void pci_init_board(void)
volatile law83xx_t *pcie_law = sysconf->pcielaw;
struct pci_region *reg[] = { pci_regions };
struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, };
- int warmboot;
/* Enable all 3 PCI_CLK_OUTPUTs. */
clk->occr |= 0xe0000000;
@@ -154,10 +153,7 @@ void pci_init_board(void)
pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR;
pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
- warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
- warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
-
- mpc83xx_pci_init(1, reg, warmboot);
+ mpc83xx_pci_init(1, reg);
/* Configure the clock for PCIE controller */
clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM,
@@ -175,7 +171,7 @@ void pci_init_board(void)
out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR);
out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB);
- mpc83xx_pcie_init(2, pcie_reg, warmboot);
+ mpc83xx_pcie_init(2, pcie_reg);
}
#if defined(CONFIG_OF_BOARD_SETUP)