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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-06-12 14:42:04 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-06-24 08:33:08 -0700 |
commit | f3acaf438de74a0b278abc71fb2aca7e7aa86ffa (patch) | |
tree | 291b9e1bbd24d084e95938ea110d2543f3bc5d74 /board/freescale/mpc8308rdb | |
parent | b66a5c03a0870db3045be2967b85684b1887ca18 (diff) | |
download | u-boot-imx-f3acaf438de74a0b278abc71fb2aca7e7aa86ffa.zip u-boot-imx-f3acaf438de74a0b278abc71fb2aca7e7aa86ffa.tar.gz u-boot-imx-f3acaf438de74a0b278abc71fb2aca7e7aa86ffa.tar.bz2 |
armv8/fsl_lsch2: Correct the cores frequency initialization
The register CLKCNCSR controls the frequency of all cores in the same
cluster.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/mpc8308rdb')
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