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| author | Priyanka Jain <priyanka.jain@nxp.com> | 2016-11-17 12:29:53 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-11-22 11:37:41 -0800 |
| commit | 7cfbb4abe3c4755363aa3d692511bf187852adf6 (patch) | |
| tree | 17d3139b8c12529f22f81d838be2ad5b8a3dc3c0 /board/freescale/ls2080ardb | |
| parent | f6b96ff665844291a76de139bfbaa75fc0c7d917 (diff) | |
| download | u-boot-imx-7cfbb4abe3c4755363aa3d692511bf187852adf6.zip u-boot-imx-7cfbb4abe3c4755363aa3d692511bf187852adf6.tar.gz u-boot-imx-7cfbb4abe3c4755363aa3d692511bf187852adf6.tar.bz2 | |
armv8: fsl-layerscape: Update TZASC registers type
TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls2080ardb')
0 files changed, 0 insertions, 0 deletions