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authorYuan Yao <yao.yuan@nxp.com>2016-11-09 11:19:54 +0800
committerYork Sun <york.sun@nxp.com>2016-11-21 09:20:32 -0800
commite2f95e3a6ab4e40ad5c8864ff8ee0195a1388601 (patch)
tree63b90191dcc4ad7b0b7014cb5623f755d7e18b54 /board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
parentc435a7c8c1b872d38fcc671369f6e290d2fff08c (diff)
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arm: ls1021a: improve the core frequency to 1.2GHZ
Change core clock to 1.2GHz in the configurations for SD and NAND boot. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg')
-rw-r--r--board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
index 222c71d..d76e913 100644
--- a/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
+++ b/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
@@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 01ee0100
# serdes protocol
-0608000a 00000000 00000000 00000000
+0608000c 00000000 00000000 00000000
60000000 00407900 e0106a00 21046000
00000000 00000000 00000000 00038000
00000000 001b7200 00000000 00000000