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| author | York Sun <york.sun@nxp.com> | 2016-12-28 08:43:45 -0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-01-04 19:40:52 -0500 |
| commit | 51370d561842ae7438337e77a93177e13796ac45 (patch) | |
| tree | da97bb17019e198360bd99d81e9d98a533c014b4 /board/freescale/corenet_ds/ddr.c | |
| parent | 66e399b68d20d96a90ba391d75c2290bd63bf4a5 (diff) | |
| download | u-boot-imx-51370d561842ae7438337e77a93177e13796ac45.zip u-boot-imx-51370d561842ae7438337e77a93177e13796ac45.tar.gz u-boot-imx-51370d561842ae7438337e77a93177e13796ac45.tar.bz2 | |
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/corenet_ds/ddr.c')
| -rw-r--r-- | board/freescale/corenet_ds/ddr.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c index f3ba41a..9c1a4c2 100644 --- a/board/freescale/corenet_ds/ddr.c +++ b/board/freescale/corenet_ds/ddr.c @@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; * Fixed sdram init -- doesn't use serial presence detect. */ extern fixed_ddr_parm_t fixed_ddr_parm_0[]; -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) extern fixed_ddr_parm_t fixed_ddr_parm_1[]; #endif @@ -56,7 +56,7 @@ phys_size_t fixed_sdram(void) ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN; fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0); -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) memcpy(&ddr_cfg_regs, fixed_ddr_parm_1[i].ddr_settings, sizeof(ddr_cfg_regs)); @@ -76,7 +76,7 @@ phys_size_t fixed_sdram(void) return 0; } } else { -#if (CONFIG_NUM_DDR_CONTROLLERS == 2) +#if (CONFIG_SYS_NUM_DDR_CTLRS == 2) /* We require both controllers have identical DIMMs */ lawbar1_target_id = LAW_TRGT_IF_DDR_1; if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, |