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| author | Ye Li <ye.li@nxp.com> | 2016-12-01 13:39:41 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-12-12 10:22:29 +0800 |
| commit | 9a4fa3f8d2762791a76fd90e83feec8c8c9235b0 (patch) | |
| tree | 1619ffcf8498ce14b5dd7743b5a3b54b4e648c75 /board/freescale/common/dcu_sii9022a.h | |
| parent | b9a24e6de8511ab9f5a2e03339ad338d11f08748 (diff) | |
| download | u-boot-imx-9a4fa3f8d2762791a76fd90e83feec8c8c9235b0.zip u-boot-imx-9a4fa3f8d2762791a76fd90e83feec8c8c9235b0.tar.gz u-boot-imx-9a4fa3f8d2762791a76fd90e83feec8c8c9235b0.tar.bz2 | |
MLK-13586-1 mx7d_arm2: Update lpddr3 script to V2.0 for Bank interleave
To improve the performance, enable the bank interleave for LPDDR3. Update
the LPDDR3 settings to new script IMX7D_LPDDR3_533MHz_2GB_32bit_V2.0.ds5.
Changes:
1. Enable bank interleave
2. Improve the drive strength for non-TO1.1 chips.
3. Updates ZQ_CON0 settings.
4. Change to 0 for reserved bits.
File:
http://compass.freescale.net/livelink/livelink?func=ll&objid=233861153&objAction=browse&sort=name&viewType=1
Test:
Passed stress test on one 19x19 lpddr3 arm2 and one 12x12 lpddr3 arm2.
Passed LPSR test on one 12x12 lpddr3 arm2.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'board/freescale/common/dcu_sii9022a.h')
0 files changed, 0 insertions, 0 deletions