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| author | Tom Rini <trini@konsulko.com> | 2016-09-26 13:24:46 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-26 17:10:56 -0400 |
| commit | cbe7706ab8aab06c18edaa9b120371f9c8012728 (patch) | |
| tree | ebbfacedf031c33969d8d2e4d7459904b7fc1647 /board/freescale/common/arm_sleep.c | |
| parent | 8f2fe0c86c56175dd7d5d0e3bc26bef41f224f03 (diff) | |
| parent | 295a24b3d6a751b79373e7ff2199d91765cae8a9 (diff) | |
| download | u-boot-imx-cbe7706ab8aab06c18edaa9b120371f9c8012728.zip u-boot-imx-cbe7706ab8aab06c18edaa9b120371f9c8012728.tar.gz u-boot-imx-cbe7706ab8aab06c18edaa9b120371f9c8012728.tar.bz2 | |
Merge git://git.denx.de/u-boot-fsl-qoriq
trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/freescale/common/arm_sleep.c')
| -rw-r--r-- | board/freescale/common/arm_sleep.c | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c index 71ed15e..16fd445 100644 --- a/board/freescale/common/arm_sleep.c +++ b/board/freescale/common/arm_sleep.c @@ -66,6 +66,36 @@ static void dp_ddr_restore(void) *dst++ = *src++; } +#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA) +void ls1_psci_resume_fixup(void) +{ + u32 tmp; + struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR; + +#ifdef QIXIS_BASE + void *qixis_base = (void *)QIXIS_BASE; + + /* Pull on PCIe RST# */ + out_8(qixis_base + QIXIS_RST_FORCE_3, 0); + + /* disable deep sleep signals in FPGA */ + tmp = in_8(qixis_base + QIXIS_PWR_CTL2); + tmp &= ~QIXIS_PWR_CTL2_PCTL; + out_8(qixis_base + QIXIS_PWR_CTL2, tmp); +#endif + + /* Disable wakeup interrupt during deep sleep */ + out_be32(&scfg->pmcintecr, 0); + /* Clear PMC interrupt status */ + out_be32(&scfg->pmcintsr, 0xffffffff); + + /* Disable Warm Device Reset */ + tmp = in_be32(&scfg->dpslpcr); + tmp &= ~SCFG_DPSLPCR_WDRR_EN; + out_be32(&scfg->dpslpcr, tmp); +} +#endif + static void dp_resume_prepare(void) { dp_ddr_restore(); @@ -74,6 +104,9 @@ static void dp_resume_prepare(void) #ifdef CONFIG_U_QE u_qe_resume(); #endif +#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA) + ls1_psci_resume_fixup(); +#endif } int fsl_dp_resume(void) @@ -88,7 +121,7 @@ int fsl_dp_resume(void) dp_resume_prepare(); /* Get the entry address and jump to kernel */ - start_addr = in_le32(&scfg->sparecr[1]); + start_addr = in_le32(&scfg->sparecr[3]); debug("Entry address is 0x%08x\n", start_addr); kernel_resume = (void (*)(void))start_addr; secure_ram_addr(_do_nonsec_entry)(kernel_resume, 0, 0, 0); |