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authorPrabhakar Kushwaha <prabhakar@freescale.com>2013-04-16 13:28:40 +0530
committerAndy Fleming <afleming@freescale.com>2013-06-20 16:09:08 -0500
commit83e0c2bbe319330454d9afc77f51693f07c5deed (patch)
tree4e6ad7441c2159ac75494d691b627b596b011b51 /board/freescale/bsc9132qds/law.c
parentf15932692669a61c66f49cf8fbf2add194c15df9 (diff)
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board/bsc9132qds:Add NAND boot support using new SPL format
- Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale/bsc9132qds/law.c')
-rw-r--r--board/freescale/bsc9132qds/law.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/board/freescale/bsc9132qds/law.c b/board/freescale/bsc9132qds/law.c
index dc23658..b4bce99 100644
--- a/board/freescale/bsc9132qds/law.c
+++ b/board/freescale/bsc9132qds/law.c
@@ -25,11 +25,13 @@
#include <asm/mmu.h>
struct law_entry law_table[] = {
-#ifndef CONFIG_SYS_NO_FLASH
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_IFC),
-#endif
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
+#endif
+#ifdef CONFIG_SYS_FPGA_BASE_PHYS
SET_LAW(CONFIG_SYS_FPGA_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
+#endif
};
int num_law_entries = ARRAY_SIZE(law_table);