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authorMinkyu Kang <mk7.kang@samsung.com>2010-01-15 22:41:58 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2010-01-15 22:41:58 +0900
commite598dfc22c8789991d165714bec53b2390fc999d (patch)
treecf3c704c4b00e06605bdfe23384b8af97022efa6 /board/faraday
parente7ae13a57b4cbaa2cd3da8ffca614853d9d84230 (diff)
parent1c2a8e359ebbec0dbef62f5b54c72f9cd72ccd59 (diff)
downloadu-boot-imx-e598dfc22c8789991d165714bec53b2390fc999d.zip
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts: cpu/arm_cortexa8/s5pc1xx/cache.c include/asm-arm/arch-s5pc1xx/sys_proto.h include/sja1000.h Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/faraday')
-rw-r--r--board/faraday/a320evb/Makefile51
-rw-r--r--board/faraday/a320evb/a320evb.c73
-rw-r--r--board/faraday/a320evb/config.mk35
-rw-r--r--board/faraday/a320evb/lowlevel_init.S118
4 files changed, 277 insertions, 0 deletions
diff --git a/board/faraday/a320evb/Makefile b/board/faraday/a320evb/Makefile
new file mode 100644
index 0000000..74f660d
--- /dev/null
+++ b/board/faraday/a320evb/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := a320evb.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/faraday/a320evb/a320evb.c b/board/faraday/a320evb/a320evb.c
new file mode 100644
index 0000000..85b11b9
--- /dev/null
+++ b/board/faraday/a320evb/a320evb.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+
+#include <asm/arch/ftsmc020.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+
+int board_init(void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_FARADAY;
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ ftsmc020_init(); /* initialize Flash */
+ return 0;
+}
+
+int dram_init(void)
+{
+ unsigned long sdram_base = PHYS_SDRAM_1;
+ unsigned long expected_size = PHYS_SDRAM_1_SIZE;
+ unsigned long actual_size;
+
+ actual_size = get_ram_size((void *)sdram_base, expected_size);
+
+ gd->bd->bi_dram[0].start = sdram_base;
+ gd->bd->bi_dram[0].size = actual_size;
+
+ if (expected_size != actual_size)
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+ actual_size >> 20, expected_size >> 20);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bd)
+{
+ return ftmac100_initialize(bd);
+}
+
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ if (banknum == 0) { /* non-CFI boot flash */
+ info->portwidth = FLASH_CFI_8BIT;
+ info->chipwidth = FLASH_CFI_BY8;
+ info->interface = FLASH_CFI_X8;
+ return 1;
+ } else
+ return 0;
+}
diff --git a/board/faraday/a320evb/config.mk b/board/faraday/a320evb/config.mk
new file mode 100644
index 0000000..aa25b98
--- /dev/null
+++ b/board/faraday/a320evb/config.mk
@@ -0,0 +1,35 @@
+#
+# (C) Copyright 2009 Faraday Technology
+# Po-Yu Chuang <ratbert@faraday-tech.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# Faraday A320 board with FA526/FA626TE/ARM926EJ-S cpus
+#
+# see http://www.faraday-tech.com/ for more information
+
+# A320 has 1 bank of 64 MB DRAM
+#
+# 1000'0000 to 1400'0000
+#
+# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
+#
+# we load ourself to 13f8'0000
+#
+# download area is 1200'0000
+
+TEXT_BASE = 0x13f80000
diff --git a/board/faraday/a320evb/lowlevel_init.S b/board/faraday/a320evb/lowlevel_init.S
new file mode 100644
index 0000000..97718c0
--- /dev/null
+++ b/board/faraday/a320evb/lowlevel_init.S
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <config.h>
+#include <version.h>
+
+#include <asm/macro.h>
+#include <asm/arch/ftsdmc020.h>
+
+/*
+ * parameters for the SDRAM controller
+ */
+#define TP0_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP0)
+#define TP1_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP1)
+#define CR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_CR)
+#define B0_BSR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_BANK0_BSR)
+#define ACR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_ACR)
+
+#define TP0_D CONFIG_SYS_FTSDMC020_TP0
+#define TP1_D CONFIG_SYS_FTSDMC020_TP1
+#define CR_D1 FTSDMC020_CR_IPREC
+#define CR_D2 FTSDMC020_CR_ISMR
+#define CR_D3 FTSDMC020_CR_IREF
+
+#define B0_BSR_D (CONFIG_SYS_FTSDMC020_BANK0_BSR | \
+ FTSDMC020_BANK_BASE(PHYS_SDRAM_1))
+#define ACR_D FTSDMC020_ACR_TOC(0x18)
+
+/*
+ * numeric 7 segment display
+ */
+.macro led, num
+ write32 CONFIG_DEBUG_LED, \num
+.endm
+
+/*
+ * Waiting for SDRAM to set up
+ */
+.macro wait_sdram
+ ldr r0, =CONFIG_FTSDMC020_BASE
+1:
+ ldr r1, [r0, #FTSDMC020_OFFSET_CR]
+ cmp r1, #0
+ bne 1b
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+ mov r11, lr
+
+ led 0x0
+
+ bl init_sdmc
+
+ led 0x1
+
+ /* everything is fine now */
+ mov lr, r11
+ mov pc, lr
+
+/*
+ * memory initialization
+ */
+init_sdmc:
+ led 0x10
+
+ /* set SDRAM register */
+
+ write32 TP0_A, TP0_D
+ led 0x11
+
+ write32 TP1_A, TP1_D
+ led 0x12
+
+ /* set to precharge */
+ write32 CR_A, CR_D1
+ led 0x13
+
+ wait_sdram
+ led 0x14
+
+ /* set mode register */
+ write32 CR_A, CR_D2
+ led 0x15
+
+ wait_sdram
+ led 0x16
+
+ /* set to refresh */
+ write32 CR_A, CR_D3
+ led 0x17
+
+ wait_sdram
+ led 0x18
+
+ write32 B0_BSR_A, B0_BSR_D
+ led 0x19
+
+ write32 ACR_A, ACR_D
+ led 0x1a
+
+ mov pc, lr