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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-11-25 13:11:08 -0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-12-01 10:20:19 +0100 |
| commit | a847fff11cc4f3745d0087d45d2e5964c47f55d2 (patch) | |
| tree | 0380e6c27c0ae0ee9beb890f934117f0b8c5cd99 /board/espt | |
| parent | 4b16fd228673a027ab122e33819695e9b7c73dd3 (diff) | |
| download | u-boot-imx-a847fff11cc4f3745d0087d45d2e5964c47f55d2.zip u-boot-imx-a847fff11cc4f3745d0087d45d2e5964c47f55d2.tar.gz u-boot-imx-a847fff11cc4f3745d0087d45d2e5964c47f55d2.tar.bz2 | |
mxc_ocotp: Do not disable the OCOTP clock after every access
Leave the OCOTP turned on, so that we subsequent access do not fail.
After enabling the thermal driver on a mx6sxsabresd board:
U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)
CPU: Freescale i.MX6SX rev1.0 at 792 MHz
CPU: Temperature 48 C
Reset cause: POR
Board: MX6SX SABRE SDB
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
00:01.0 - 16c3:abcd - Bridge device
01:00.0 - 8086:08b1 - Network controller
In: serial
Out: serial
Err: serial
Net:
(hang)
As the thermal driver accesses the ocotp registers, its clock will be disabled
afterwards.
Then when the MAC address is read (also from ocotp registers) it will cause a
hang.
Do not disable the ocotp clock to prevent this problem.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Diffstat (limited to 'board/espt')
0 files changed, 0 insertions, 0 deletions