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| author | Roger Quadros <rogerq@ti.com> | 2013-11-11 16:56:38 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-12-04 08:12:08 -0500 |
| commit | 2faf5fb82ed6f3df07635cddca0a2a54e3ef74ef (patch) | |
| tree | fb1cfca52da716b2831b87948d5f427afb7e7a1f /board/cpu86 | |
| parent | d73763a4fbc741b3faee43d0a668dd220a81d772 (diff) | |
| download | u-boot-imx-2faf5fb82ed6f3df07635cddca0a2a54e3ef74ef.zip u-boot-imx-2faf5fb82ed6f3df07635cddca0a2a54e3ef74ef.tar.gz u-boot-imx-2faf5fb82ed6f3df07635cddca0a2a54e3ef74ef.tar.bz2 | |
ahci: Fix cache align error messages
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Aneesh V <aneesh@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Diffstat (limited to 'board/cpu86')
0 files changed, 0 insertions, 0 deletions