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authorStephen Warren <swarren@nvidia.com>2012-11-01 12:14:37 +0000
committerTom Warren <twarren@nvidia.com>2012-11-19 08:15:41 -0700
commit7155dc97f62a7bb3c64eee0a643c8e329abe9f3c (patch)
treeb9020b8e319d88567ac673233a4d8d0ad6680353 /board/compulab
parent4576c6e6f85c2d8a14e0219a87f54b4c59f55395 (diff)
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ARM: tegra: TrimSlice: add support for USB1 port
TrimSlice's USB1 port has two purposes; it either acts as a device port hosting Tegra's USB recovery protocol, or acts as a host port connected to the internal USB->SATA bridge chip, which may in turn be connected to an SSD or HDD. Add the appropriate device tree and board configuration options to enable this port as a host port, and route the port to the SATA bridge using the VBUS GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/compulab')
-rw-r--r--board/compulab/dts/tegra20-trimslice.dts3
-rw-r--r--board/compulab/trimslice/trimslice.c8
2 files changed, 10 insertions, 1 deletions
diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts
index db79e77..4450674 100644
--- a/board/compulab/dts/tegra20-trimslice.dts
+++ b/board/compulab/dts/tegra20-trimslice.dts
@@ -8,6 +8,7 @@
aliases {
usb0 = "/usb@c5008000";
+ usb1 = "/usb@c5000000";
};
memory {
@@ -48,7 +49,7 @@
};
usb@c5000000 {
- status = "disabled";
+ nvidia,vbus-gpio = <&gpio 170 0>; /* PV2 */
};
usb@c5004000 {
diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c
index 9ef66fd..8f4dd09 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -34,6 +34,14 @@
#include <mmc.h>
#endif
+void pin_mux_usb(void)
+{
+ /*
+ * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO
+ * in the current device tree.
+ */
+ pinmux_tristate_disable(PINGRP_UAC);
+}
void pin_mux_spi(void)
{