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authorKim Phillips <kim.phillips@freescale.com>2007-05-16 16:52:19 -0500
committerWolfgang Denk <wd@denx.de>2007-05-17 00:07:21 +0200
commit255a3577c848706441daee0174543efe205a77f8 (patch)
treee4060fa18c74a71b86aaf80f86f62abfea02d114 /board/cds/mpc8548cds
parent3a71b5ca775fc9cf506c12d91925019591446c7c (diff)
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Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board/cds/mpc8548cds')
-rw-r--r--board/cds/mpc8548cds/mpc8548cds.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index 929ff2e..b723641 100644
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -345,23 +345,23 @@ int last_stage_init(void)
/* This is needed to get the RGMII working for the 1.3+
* CDS cards */
if (get_board_version() == 0x13) {
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 18);
- miiphy_read(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_read(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, &temp);
temp = (temp & 0xf03f);
temp |= 2 << 9; /* 36 ohm */
temp |= 2 << 6; /* 39 ohm */
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, temp);
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 3);
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, 0x8000);
}