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authorWolfgang Denk <wd@pollux.denx.de>2006-10-24 17:08:31 +0200
committerWolfgang Denk <wd@pollux.denx.de>2006-10-24 17:08:31 +0200
commitd97370feca2a589dad42154577bb4615a0347852 (patch)
tree5a3f85d24e07425977b7019017ae1615c0f12ce7 /board/cds/common
parent9fa48022e5883a0826a98979c0156f6ac5a0ef79 (diff)
parent47a6989c10685d2ab3efcf95228ce50d2a496d3e (diff)
downloadu-boot-imx-d97370feca2a589dad42154577bb4615a0347852.zip
u-boot-imx-d97370feca2a589dad42154577bb4615a0347852.tar.gz
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Merge with /home/wd/git/u-boot/master
(Conflicts between Jon Loeliger's and Matthew McClintock's tree were resolved by in favour of Jon's version.)
Diffstat (limited to 'board/cds/common')
-rw-r--r--board/cds/common/ft_board.c28
-rw-r--r--board/cds/common/via.c19
2 files changed, 39 insertions, 8 deletions
diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c
index 77d1d85..9d97905 100644
--- a/board/cds/common/ft_board.c
+++ b/board/cds/common/ft_board.c
@@ -24,9 +24,33 @@
#if defined(CONFIG_OF_FLAT_TREE)
#include <ft_build.h>
+#include "cadmus.h"
+
extern void ft_cpu_setup(void *blob, bd_t *bd);
-#endif
+static void cds_pci_fixup(void *blob)
+{
+ int len;
+ u32 *map;
+ int slot;
+ int i;
+
+ map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len);
+
+ len /= sizeof(u32);
+
+ slot = get_pci_slot();
+
+ for (i=0;i<len;i+=7) {
+ /* We rotate the interrupt pins so that the mapping
+ * changes depending on the slot the carrier card is in.
+ */
+ map[3] = ((map[3] + slot - 2) % 4) + 1;
+
+ map+=7;
+ }
+}
+#endif
#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
void
@@ -45,5 +69,7 @@ ft_board_setup(void *blob, bd_t *bd)
*p++ = cpu_to_be32(bd->bi_memstart);
*p = cpu_to_be32(bd->bi_memsize);
}
+
+ cds_pci_fixup(blob);
}
#endif
diff --git a/board/cds/common/via.c b/board/cds/common/via.c
index 68c8d21..e79bd02 100644
--- a/board/cds/common/via.c
+++ b/board/cds/common/via.c
@@ -24,7 +24,8 @@
#include <pci.h>
/* Config the VIA chip */
-void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pci_dev_t bridge;
@@ -47,7 +48,8 @@ void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_c
}
/* Function 1, IDE */
-void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usbide(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pciauto_config_device(hose, dev);
/*
@@ -64,7 +66,8 @@ void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struc
}
/* Function 2, USB ports 0-1 */
-void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usb(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pciauto_config_device(hose, dev);
@@ -72,7 +75,8 @@ void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct p
}
/* Function 3, USB ports 2-3 */
-void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usb2(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pciauto_config_device(hose, dev);
@@ -80,7 +84,8 @@ void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct
}
/* Function 5, Power Management */
-void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_power(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pciauto_config_device(hose, dev);
@@ -90,10 +95,10 @@ void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct
}
/* Function 6, AC97 Interface */
-void mpc85xx_config_via_ac97(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_ac97(struct pci_controller *hose,
+ pci_dev_t dev, struct pci_config_table *tab)
{
pciauto_config_device(hose, dev);
pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00);
}
-