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author | Fabio Estevam <fabio.estevam@nxp.com> | 2016-01-04 21:38:08 -0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2016-01-10 10:50:24 +0100 |
commit | 4b421d4ea179f8aed52c5b1be45c4dd75a529c91 (patch) | |
tree | 87a878b7b0c62608b30bc9c38c01fbc105da9042 /board/bf527-ad7160-eval | |
parent | 587c3f8ebe356b558f1876414885c1b4a31294ab (diff) | |
download | u-boot-imx-4b421d4ea179f8aed52c5b1be45c4dd75a529c91.zip u-boot-imx-4b421d4ea179f8aed52c5b1be45c4dd75a529c91.tar.gz u-boot-imx-4b421d4ea179f8aed52c5b1be45c4dd75a529c91.tar.bz2 |
mx6cuboxi: Fix the reset delay for the AR8035 PHY
Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:
Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
As per the AR8035 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."
So do as suggested and keep the reset low for 10ms.
Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/bf527-ad7160-eval')
0 files changed, 0 insertions, 0 deletions