PXA: Balloon3 board support

The following hardware is currently supported:
- UART
- USB Host
- FPGA

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

5 files changed, 369 insertions, 0 deletions

diff --git a/board/balloon3/Makefile b/board/balloon3/Makefile
new file mode 100644
index 0000000..3928e1f
--- /dev/null
+++ b/board/balloon3/Makefile
@@ -0,0 +1,49 @@
+#
+# Balloon3 Support
+#
+# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= balloon3.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
new file mode 100644
index 0000000..2d6eabe
--- /dev/null
+++ b/board/balloon3/balloon3.c
@@ -0,0 +1,228 @@
+/*
+ * Balloon3 Support
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <serial.h>
+#include <asm/io.h>
+#include <spartan3.h>
+#include <command.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void balloon3_init_fpga(void);
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init(void)
+{
+	/* arch number of vpac270 */
+	gd->bd->bi_arch_number = MACH_TYPE_BALLOON3;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+	/* Init the FPGA */
+	balloon3_init_fpga();
+
+	return 0;
+}
+
+struct serial_device *default_serial_console(void)
+{
+	return &serial_stuart_device;
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+
+	return 0;
+}
+
+#ifdef	CONFIG_CMD_USB
+int usb_board_init(void)
+{
+	writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
+		~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
+		UHCHR);
+
+	writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
+
+	while (readl(UHCHR) & UHCHR_FSBIR)
+		;
+
+	writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
+	writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
+
+	/* Clear any OTG Pin Hold */
+	if (readl(PSSR) & PSSR_OTGPH)
+		writel(readl(PSSR) | PSSR_OTGPH, PSSR);
+
+	writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
+	writel(readl(UHCRHDA) | 0x100, UHCRHDA);
+
+	/* Set port power control mask bits, only 3 ports. */
+	writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
+
+	/* enable port 2 */
+	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
+		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
+
+	return 0;
+}
+
+void usb_board_init_fail(void)
+{
+	return;
+}
+
+void usb_board_stop(void)
+{
+	writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+	udelay(11);
+	writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
+
+	writel(readl(UHCCOMS) | 1, UHCCOMS);
+	udelay(10);
+
+	writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
+
+	return;
+}
+#endif
+
+#if defined(CONFIG_FPGA)
+/* Toggle GPIO103 and GPIO104 --  PROGB and RDnWR */
+int fpga_pgm_fn(int nassert, int nflush, int cookie)
+{
+	if (nassert)
+		writel(0x80, GPCR3);
+	else
+		writel(0x80, GPSR3);
+	if (nflush)
+		writel(0x100, GPCR3);
+	else
+		writel(0x100, GPSR3);
+	return nassert;
+}
+
+/* Check GPIO83 -- INITB */
+int fpga_init_fn(int cookie)
+{
+	return !(readl(GPLR2) & 0x80000);
+}
+
+/* Check GPIO84 -- BUSY */
+int fpga_busy_fn(int cookie)
+{
+	return !(readl(GPLR2) & 0x100000);
+}
+
+/* Check GPIO111 -- DONE */
+int fpga_done_fn(int cookie)
+{
+	return readl(GPLR3) & 0x8000;
+}
+
+/* Configure GPIO104 as GPIO and deassert it */
+int fpga_pre_config_fn(int cookie)
+{
+	writel(readl(GAFR3_L) & ~0x30000, GAFR3_L);
+	writel(0x100, GPCR3);
+	return 0;
+}
+
+/* Configure GPIO104 as nSKTSEL */
+int fpga_post_config_fn(int cookie)
+{
+	writel(readl(GAFR3_L) | 0x10000, GAFR3_L);
+	return 0;
+}
+
+/* Toggle RDnWR */
+int fpga_wr_fn(int nassert_write, int flush, int cookie)
+{
+	udelay(1000);
+
+	if (nassert_write)
+		writel(0x100, GPCR3);
+	else
+		writel(0x100, GPSR3);
+
+	return nassert_write;
+}
+
+/* Write program to the FPGA */
+int fpga_wdata_fn(uchar data, int flush, int cookie)
+{
+	writeb(data, 0x10f00000);
+	return 0;
+}
+
+/* Toggle Clock pin -- NO-OP */
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+	return assert_clk;
+}
+
+/* Toggle ChipSelect pin -- NO-OP */
+int fpga_cs_fn(int assert_clk, int flush, int cookie)
+{
+	return assert_clk;
+}
+
+Xilinx_Spartan3_Slave_Parallel_fns balloon3_fpga_fns = {
+	fpga_pre_config_fn,
+	fpga_pgm_fn,
+	fpga_init_fn,
+	NULL,	/* err */
+	fpga_done_fn,
+	fpga_clk_fn,
+	fpga_cs_fn,
+	fpga_wr_fn,
+	NULL,	/* rdata */
+	fpga_wdata_fn,
+	fpga_busy_fn,
+	NULL,	/* abort */
+	fpga_post_config_fn,
+};
+
+Xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel,
+			(void *)&balloon3_fpga_fns, 0);
+
+/* Initialize the FPGA */
+void balloon3_init_fpga(void)
+{
+	fpga_init();
+	fpga_add(fpga_xilinx, &fpga);
+}
+#else
+void balloon3_init_fpga(void) {}
+#endif /* CONFIG_FPGA */
diff --git a/board/balloon3/config.mk b/board/balloon3/config.mk
new file mode 100644
index 0000000..1d650ac
--- /dev/null
+++ b/board/balloon3/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0xa1000000
diff --git a/board/balloon3/lowlevel_init.S b/board/balloon3/lowlevel_init.S
new file mode 100644
index 0000000..d7b5be6
--- /dev/null
+++ b/board/balloon3/lowlevel_init.S
@@ -0,0 +1,36 @@
+/*
+ * Balloon3 Lowlevel Hardware Initialization
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/macro.h>
+
+.globl lowlevel_init
+lowlevel_init:
+	pxa_gpio_setup
+	pxa_wait_ticks	0x8000
+	pxa_mem_setup
+	pxa_wakeup
+	pxa_intr_setup
+	pxa_clock_setup
+
+	mov	pc, lr
diff --git a/board/balloon3/u-boot.lds b/board/balloon3/u-boot.lds
new file mode 100644
index 0000000..58c371d
--- /dev/null
+++ b/board/balloon3/u-boot.lds
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	  cpu/pxa/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}