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author | Tom Rini <trini@ti.com> | 2014-11-05 12:48:09 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-11-05 12:48:09 -0500 |
commit | 625509ab0edbb7d943ad9028de3c21ca48aa58be (patch) | |
tree | 2ea6bda524b3ad7e964f4357428de2890ad81cf4 /board/bachmann/ot1200 | |
parent | d5325eff10922acb11c39efece6d5f24de5b1998 (diff) | |
parent | 0b23780ff02bdbec46fac1fe4151e2ebf1eae881 (diff) | |
download | u-boot-imx-625509ab0edbb7d943ad9028de3c21ca48aa58be.zip u-boot-imx-625509ab0edbb7d943ad9028de3c21ca48aa58be.tar.gz u-boot-imx-625509ab0edbb7d943ad9028de3c21ca48aa58be.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'board/bachmann/ot1200')
-rw-r--r-- | board/bachmann/ot1200/ot1200.c | 70 |
1 files changed, 65 insertions, 5 deletions
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index acf95cb..2ed8cf7 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -104,10 +104,25 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs) return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(1, 3)) : -1; } +static iomux_v3_cfg_t const feature_pads[] = { + /* SD card detect */ + MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_DOWN), + + /* eMMC soldered? */ + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP), +}; + +static void setup_iomux_features(void) +{ + imx_iomux_v3_setup_multiple_pads(feature_pads, + ARRAY_SIZE(feature_pads)); +} + int board_early_init_f(void) { setup_iomux_uart(); setup_iomux_spi(); + setup_iomux_features(); return 0; } @@ -126,23 +141,68 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + int board_mmc_getcd(struct mmc *mmc) { - return 1; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret; + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) { + gpio_direction_input(IMX_GPIO_NR(4, 5)); + ret = gpio_get_value(IMX_GPIO_NR(4, 5)); + } else { + gpio_direction_input(IMX_GPIO_NR(1, 4)); + ret = !gpio_get_value(IMX_GPIO_NR(1, 4)); + } + + return ret; } -struct fsl_esdhc_cfg usdhc_cfg[] = { +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, }; int board_mmc_init(bd_t *bis) { + s32 status = 0; + u32 index = 0; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[0].max_bus_width = 8; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + usdhc_cfg[0].max_bus_width = 8; + usdhc_cfg[1].max_bus_width = 4; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); + return status; } #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) |