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| author | York Sun <york.sun@nxp.com> | 2016-08-29 17:04:13 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:05:38 -0700 |
| commit | 4baa38c51a3187990a31519f8163519eda3890b5 (patch) | |
| tree | 266a3c50b1c496f8db419610e6c924bbb3f83dd0 /board/armltd/integrator/pci_v3.h | |
| parent | b406731aa9861591352f274f5744c7cb003b9677 (diff) | |
| download | u-boot-imx-4baa38c51a3187990a31519f8163519eda3890b5.zip u-boot-imx-4baa38c51a3187990a31519f8163519eda3890b5.tar.gz u-boot-imx-4baa38c51a3187990a31519f8163519eda3890b5.tar.bz2 | |
driver/ddr/fsl: Revise workaround A008511 for A009803
DDR controller 5.2.1 has this erratum A008511 partially fixed.
The workaround needs to be adjusted to take advantage of Vref
training. This patch enables the training and force output
enable to be off.
Erratum A009803 requires the controller to be idel before enabling
address parity. It was combined with workaround for A008511. With
new A008511 flow, this flow needs to be changed to enabling
data init (D_INIT) after the address parity is enabled.
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Diffstat (limited to 'board/armltd/integrator/pci_v3.h')
0 files changed, 0 insertions, 0 deletions