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| author | Markus Klotzbuecher <mk@denx.de> | 2007-05-07 14:10:38 +0200 |
|---|---|---|
| committer | Markus Klotzbuecher <mk@pollux.denx.de> | 2007-05-07 14:10:38 +0200 |
| commit | 6ede0c8b69ad1e6b16463ec75a6dccca152c4b17 (patch) | |
| tree | 978dcbd6189998876bb227ae5bbea03000a2f9c5 /board/amcc/sequoia | |
| parent | 61ea75aa07838435ec570ac85a2e3fc038844596 (diff) | |
| parent | ac4cd59d59c9bf3f89cb7a344abf8184d678f562 (diff) | |
| download | u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.zip u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.tar.gz u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.tar.bz2 | |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'board/amcc/sequoia')
| -rw-r--r-- | board/amcc/sequoia/sdram.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index f8b837e..d045df1 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -371,6 +371,14 @@ void denali_core_search_data_eye(unsigned long memory_size) } #endif /* CONFIG_DDR_DATA_EYE */ +#if defined(CONFIG_NAND_SPL) +/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big + * for the 4k NAND boot image so define bus_frequency to 133MHz here + * which is save for the refresh counter setup. + */ +#define get_bus_freq(val) 133000000 +#endif + /************************************************************************* * * initdram -- 440EPx's DDR controller is a DENALI Core @@ -404,7 +412,7 @@ long int initdram (int board_type) mtsdram(DDR0_22, 0x00267F0B); mtsdram(DDR0_23, 0x00000000); mtsdram(DDR0_24, 0x01010002); - if (speed > 133333333) + if (speed > 133333334) mtsdram(DDR0_26, 0x5B26050C); else mtsdram(DDR0_26, 0x5B260408); |