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authorStefan Roese <sr@denx.de>2007-01-05 10:38:05 +0100
committerStefan Roese <sr@denx.de>2007-01-05 10:38:05 +0100
commit023889838282b6237b401664f22dd22dfba2c066 (patch)
treea57a564f35070ba04ed56dea78367a2f5d7c13d9 /board/amcc/sequoia/init.S
parent92eb729bad876725aeea908d2addba0800620840 (diff)
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[PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/sequoia/init.S')
-rw-r--r--board/amcc/sequoia/init.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index 3d4ac85..45bcd4b 100644
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -90,7 +90,7 @@ tlbtab:
/*
* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
* speed up boot process. It is patched after relocation to enable SA_I
- */
+ */
#ifndef CONFIG_NAND_SPL
tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
#else