From 023889838282b6237b401664f22dd22dfba2c066 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 5 Jan 2007 10:38:05 +0100 Subject: [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese --- board/amcc/sequoia/init.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/amcc/sequoia/init.S') diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S index 3d4ac85..45bcd4b 100644 --- a/board/amcc/sequoia/init.S +++ b/board/amcc/sequoia/init.S @@ -90,7 +90,7 @@ tlbtab: /* * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I - */ + */ #ifndef CONFIG_NAND_SPL tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G ) #else -- cgit v1.1