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authorMarek Vasut <marex@denx.de>2015-07-25 08:22:21 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:04 +0200
commit9617ceb9cfc1eeb3ca0d962b53d2d87506cc23ca (patch)
tree21c951b39b254a3d77bc2f0be5d9bb9b81aca240 /board/altera/socfpga/qts/pinmux_config.h
parent2e8fcc7e41cc5fea7fa399e5e35fc261fa67b13b (diff)
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arm: socfpga: Move generated files into qts subdir
Move all the files generated by Quartus into the qts/ subdir of the board/altera/socfpga dir to make them explicitly separate from the generic U-Boot code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'board/altera/socfpga/qts/pinmux_config.h')
-rw-r--r--board/altera/socfpga/qts/pinmux_config.h54
1 files changed, 54 insertions, 0 deletions
diff --git a/board/altera/socfpga/qts/pinmux_config.h b/board/altera/socfpga/qts/pinmux_config.h
new file mode 100644
index 0000000..21fabb0
--- /dev/null
+++ b/board/altera/socfpga/qts/pinmux_config.h
@@ -0,0 +1,54 @@
+/* This file is generated by Preloader Generator */
+
+#ifndef _PRELOADER_PINMUX_CONFIG_H_
+#define _PRELOADER_PINMUX_CONFIG_H_
+
+/*
+ * State of enabling for which IP connected out through the muxing.
+ * Value 1 mean the IP connection is muxed out
+ */
+#define CONFIG_HPS_EMAC0 (1)
+#define CONFIG_HPS_EMAC1 (0)
+#define CONFIG_HPS_USB0 (0)
+#define CONFIG_HPS_USB1 (1)
+#define CONFIG_HPS_NAND (0)
+#define CONFIG_HPS_SDMMC (1)
+#define CONFIG_HPS_QSPI (0)
+#define CONFIG_HPS_UART0 (1)
+#define CONFIG_HPS_UART1 (0)
+#define CONFIG_HPS_TRACE (0)
+#define CONFIG_HPS_I2C0 (1)
+#define CONFIG_HPS_I2C1 (0)
+#define CONFIG_HPS_I2C2 (0)
+#define CONFIG_HPS_I2C3 (0)
+#define CONFIG_HPS_SPIM0 (0)
+#define CONFIG_HPS_SPIM1 (0)
+#define CONFIG_HPS_SPIS0 (0)
+#define CONFIG_HPS_SPIS1 (0)
+#define CONFIG_HPS_CAN0 (1)
+#define CONFIG_HPS_CAN1 (0)
+
+/* IP attribute value (which affected by pin muxing configuration) */
+#define CONFIG_HPS_SDMMC_BUSWIDTH (8)
+
+/* 1 if the pins are connected out */
+#define CONFIG_HPS_QSPI_CS0 (0)
+#define CONFIG_HPS_QSPI_CS1 (0)
+#define CONFIG_HPS_QSPI_CS2 (0)
+#define CONFIG_HPS_QSPI_CS3 (0)
+
+/* UART */
+/* 1 means the pin is mux out or available */
+#define CONFIG_HPS_UART0_TX (1)
+#define CONFIG_HPS_UART0_RX (1)
+#define CONFIG_HPS_UART0_CTS (0)
+#define CONFIG_HPS_UART0_RTS (0)
+#define CONFIG_HPS_UART1_TX (0)
+#define CONFIG_HPS_UART1_RX (0)
+#define CONFIG_HPS_UART1_CTS (0)
+#define CONFIG_HPS_UART1_RTS (0)
+
+/* Pin mux data */
+#define CONFIG_HPS_PINMUX_NUM (207)
+
+#endif /* _PRELOADER_PINMUX_CONFIG_H_ */