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| author | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
| commit | 10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch) | |
| tree | c3ac82364df83db5d5cb963c64b863b77a20445c /board/MigoR/lowlevel_init.S | |
| parent | 97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff) | |
| parent | 1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff) | |
| download | u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.zip u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.gz u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.bz2 | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/MigoR/lowlevel_init.S')
| -rw-r--r-- | board/MigoR/lowlevel_init.S | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/board/MigoR/lowlevel_init.S b/board/MigoR/lowlevel_init.S index 2ec8e04..e48f7b3 100644 --- a/board/MigoR/lowlevel_init.S +++ b/board/MigoR/lowlevel_init.S @@ -87,7 +87,7 @@ lowlevel_init: mov.w r0, @r1 mov.l DLLFRQ_A, r1 ! 20080115 - mov.l DLLFRQ_D, r0 ! 20080115 + mov.l DLLFRQ_D, r0 ! 20080115 mov.l r0, @r1 mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register @@ -100,11 +100,11 @@ lowlevel_init: bsc_init: mov.l CMNCR_A, r1 ! CMNCR address -> R1 - mov.l CMNCR_D, r0 ! CMNCR data -> R0 + mov.l CMNCR_D, r0 ! CMNCR data -> R0 mov.l r0, @r1 ! CMNCR set mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 - mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 + mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 mov.l r0, @r1 ! CS0BCR set mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 @@ -112,35 +112,35 @@ bsc_init: mov.l r0, @r1 ! CS4BCR set mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 - mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 + mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 mov.l r0, @r1 ! CS5ABCR set mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 - mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 + mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 mov.l r0, @r1 ! CS5BBCR set mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 - mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 + mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 mov.l r0, @r1 ! CS6ABCR set mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 - mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 + mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 mov.l r0, @r1 ! CS0WCR set mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 - mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 + mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 mov.l r0, @r1 ! CS4WCR set mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 - mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 + mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 mov.l r0, @r1 ! CS5AWCR set mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 - mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 + mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 mov.l r0, @r1 ! CS5BWCR set mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 - mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 + mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 mov.l r0, @r1 ! CS6AWCR set ! SDRAM initialization @@ -173,7 +173,7 @@ bsc_init: mov.l r0, @r1 mov.l SDMR3_A, r1 ! SDMR3 address -> R1 - mov #0x00, r0 ! SDMR3 data -> R0 + mov #0x00, r0 ! SDMR3 data -> R0 mov.b r0, @r1 ! SDMR3 set ! BL bit off (init = ON) (?!?) |