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| author | Peng Fan <peng.fan@nxp.com> | 2016-03-28 15:59:49 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2016-03-28 15:59:49 +0800 |
| commit | ebd4b8a0ce4de61666d1d49e250152308cbde248 (patch) | |
| tree | d9f9c784f7cac3f6ad56b996688503fbcd3be004 /arch | |
| parent | 9b9d461472a3dde52dcea2f82388abdd6d364718 (diff) | |
| download | u-boot-imx-ebd4b8a0ce4de61666d1d49e250152308cbde248.zip u-boot-imx-ebd4b8a0ce4de61666d1d49e250152308cbde248.tar.gz u-boot-imx-ebd4b8a0ce4de61666d1d49e250152308cbde248.tar.bz2 | |
MLK-12591: Define MX6UL_SNVS_LP_BASE_ADDR to avoid build break
We have runtime checking now, since SNVS_LP_BASE_ADDR is only for i.MX6UL
now, so it will break building for other i.MX6[x].
Introduce MX6UL_SNVS_LP_BASE_ADDR to avoid build break.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index e95e19a..af99b3e 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -485,8 +485,8 @@ int arch_cpu_init(void) * it can be set to 2b'01 to disable internal pull up. * It can save about 30uA power in SNVS mode. */ - writel((readl(SNVS_LP_BASE_ADDR + 0x10) & (~0x1400)) | 0x400, - SNVS_LP_BASE_ADDR + 0x10); + writel((readl(MX6UL_SNVS_LP_BASE_ADDR + 0x10) & (~0x1400)) | 0x400, + MX6UL_SNVS_LP_BASE_ADDR + 0x10); } } diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 729f1c6..d09ec47 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -205,6 +205,7 @@ #define GPIO3_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x24000) #define GPIO4_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x28000) #define GPIO5_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x2C000) +#define MX6UL_SNVS_LP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x30000) #if defined(CONFIG_MX6UL) #define SNVS_LP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x30000) #define ENET2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000) |