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authorAndreas Bießmann <biessmann@corscience.de>2010-06-09 14:13:45 +0200
committerWolfgang Denk <wd@denx.de>2010-06-29 22:34:11 +0200
commiteb70d05d740c1d82474d2c31242a4e995584de24 (patch)
tree0fabc66bf36b501115c442435e5508f1b8ae0162 /arch
parentc99ea790788ae83d813e2c6c03291cb5672cc6c0 (diff)
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avr32: disable branch folding
Due to a hardware bug mentioned in latest AP7000 datasheet errata (revision M from 09.09) branch folding is unreliable. This patch disables CPUCR.FE bitfield as stated in datasheet. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/avr32/cpu/start.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/avr32/cpu/start.S b/arch/avr32/cpu/start.S
index d37a46e..99c9e06 100644
--- a/arch/avr32/cpu/start.S
+++ b/arch/avr32/cpu/start.S
@@ -27,9 +27,10 @@
#define SYSREG_MMUCR_S_OFFSET 4
#define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0))
-#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE) \
- | SYSREG_BIT(FE) | SYSREG_BIT(RE) \
- | SYSREG_BIT(IBE) | SYSREG_BIT(IEE))
+/* due to errata (unreliable branch folding) clear FE bit explicitly */
+#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE) \
+ | SYSREG_BIT(RE) | SYSREG_BIT(IBE) \
+ | SYSREG_BIT(IEE)) & ~SYSREG_BIT(FE))
/*
* To save some space, we use the same entry point for