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authorVitaly Andrianov <vitalya@ti.com>2015-09-19 16:26:47 +0530
committerTom Rini <trini@konsulko.com>2015-10-22 14:22:21 -0400
commitcddb330035a7418c20b64fb8817715a2b7b7859a (patch)
treeda74d65c8d649f5feaf1791e46245216d9a99f79 /arch
parent11d8222a26a3bd073f924d01792338b479e21982 (diff)
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ARM: k2g: update keystone nav rx queue numbers
update K2G nav rx queue number Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-keystone/include/mach/hardware.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 286c63a..edebcd7 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -125,8 +125,13 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_EDMA_PARAM_1(x) (0x4020 + (4 * x))
/* NETCP pktdma */
+#ifdef CONFIG_SOC_K2G
+#define KS2_NETCP_PDMA_RX_FREE_QUEUE 113
+#define KS2_NETCP_PDMA_RX_RCV_QUEUE 114
+#else
#define KS2_NETCP_PDMA_RX_FREE_QUEUE 4001
#define KS2_NETCP_PDMA_RX_RCV_QUEUE 4002
+#endif
/* Chip Interrupt Controller */
#define KS2_CIC2_BASE 0x02608000