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| author | Alexey Brodkin <abrodkin@synopsys.com> | 2016-06-08 08:19:33 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2016-06-13 14:38:05 +0200 |
| commit | c7d8db66ffd1c20b6a27445af892c28305e64e8a (patch) | |
| tree | 8b74ac2b269a23f64b3aec13ecff6aa6d1d9ee4a /arch | |
| parent | a4a43fcf9cca1ebd3d26f9a01b923b7393d69c54 (diff) | |
| download | u-boot-imx-c7d8db66ffd1c20b6a27445af892c28305e64e8a.zip u-boot-imx-c7d8db66ffd1c20b6a27445af892c28305e64e8a.tar.gz u-boot-imx-c7d8db66ffd1c20b6a27445af892c28305e64e8a.tar.bz2 | |
board: axs10x: Flush entire cache after programming reset vector
Now when we have support of IOC (IO-Coherency block) cahce operations
on regions are tuned to not be dummy stubs if IOC was found and enabled
in the core. That makes flush_dcache_range() useless for our purposes
here. And since we do need to flush modified reset vector to at least L2
cache (AKA SLC) so other cores will see it via its L1 instruction cache
we're using always functional flush_dcache_all() here.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions